Design Verification Lead
Listing sourced from adzuna on 5/20/2026. CVCraft does not host this job; clicking Apply redirects to the source.
Job Description
Role Overview This is a leadership role for a highly experienced Design Verification engineer who can drive end-to-end verification for a block, subsystem, or SoC. The ideal candidate combines deep hands-on expertise in SystemVerilog/UVM with strong technical leadership, a track record of mentoring teams, and the ability to deliver robust verification outcomes on complex semiconductor programs. Core Responsibilities Own and lead verification for a block, subsystem, or SoC from planning through …
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